EA DOGM128 Driver
0.1
Driver code for the EA DOGM128
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Macros | |
#define | DOG_SPI_PORT PORTB |
#define | DOG_SS_BAR_PIN 0 |
#define | DOG_SPIF_BIT 7 |
#define | DOG_SPSR SPSR |
#define | DOG_SPR2X 0 |
#define | DOG_SPDR SPDR |
#define | DOG_SPCR SPCR |
#define | DOG_SPIE 7 |
#define | DOG_SPE 6 |
#define | DOG_DORD 5 |
#define | DOG_MSTR 4 |
#define | DOG_CPOL 3 |
#define | DOG_CPHA 2 |
#define | DOG_SPR1 1 |
#define | DOG_SPR0 0 |
#define | DOG_RESET_PORT PORTB |
#define | DOG_RESET_PIN 5 |
#define | DOG_DATA_OR_COMMAND_PORT PORTB |
#define | DOG_DATA_OR_COMMAND_PIN 4 |
This file contains definitions that allow the user to customize the library. Here, the user can change the i/o pins of the DOG module in addition to changing the SPI registers, ports, and pins for maximum portability. In this way, this code can be easilly ported to another compiler or even another microcontroller.
#define DOG_CPHA 2 |
SPI Clock Phase Bit
#define DOG_CPOL 3 |
SPI Clock Polarity Bit
#define DOG_DATA_OR_COMMAND_PIN 4 |
Pin within DOG_DATA_OR_COMMAND_PORT where the DOG module's A0 pin is connected.
#define DOG_DATA_OR_COMMAND_PORT PORTB |
Port where the DOG module's A0 pin is to be connected.
#define DOG_DORD 5 |
SPI Data Order Bit
#define DOG_MSTR 4 |
SPI Master/Slave Mode Bit
#define DOG_RESET_PIN 5 |
Pin within DOG_RESET_PORT where the DOG module's reset pin is connected.
#define DOG_RESET_PORT PORTB |
Port where the DOG module's reset pin is to be connected.
#define DOG_SPCR SPCR |
SPI Control Register
#define DOG_SPDR SPDR |
SPI Data Register
#define DOG_SPE 6 |
SPI Enable Bit
#define DOG_SPI_PORT PORTB |
include file for the ATMega128. Can be replaced with another header file when porting to another MCU or compiler.MCU Port where SPI pins reside
#define DOG_SPIE 7 |
SPI Interrupt Enable Bit
#define DOG_SPIF_BIT 7 |
SPI Interrupt Flag bit position
#define DOG_SPR0 0 |
SPI Clock Speed Bit 0
#define DOG_SPR1 1 |
SPI Clock Speed Bit 1
#define DOG_SPR2X 0 |
SPI Double SCK
#define DOG_SPSR SPSR |
SPI Status Register
#define DOG_SS_BAR_PIN 0 |
Chip Select Pin